FIG. 12 is a diagram showing the overview of signal transmission in an air conditioner. In the figure, an indoor unit 1 performs signal transmission between an outdoor unit 2 and a remote controller 3. The indoor unit 1 and the remote controller 3 are connected to each other normally with a transmission path 4 that includes two lines (e.g., a double core cable). The indoor unit 1 and the remote controller 3 each include a transmission unit T and a reception unit R, so that they can perform transmission and reception between each other. The power supply for the remote controller 3 is supplied from a power superimposition circuit 1p provided at the indoor unit 1 via the transmission path 4.
FIG. 13 shows one example of a signal waveform according to AMI (Alternate Mark Inversion) scheme used for signal transmission. AMI scheme is one of the schemes that transmit digital signals through half-duplex communication, in which a signal is transmitted by setting the signal voltage without DC components between the two lines of the transmission path to one of zero, plus, and minus. For example, in the case of negative logic, logic 1 is allotted to zero, and logic 0 is alternately allotted to the level of plus or minus. Further, every time a 1-bit signal is transmitted, a period is provided for discharging charges accumulated in a floating capacitance (stray capacitance) that is present between the two lines of the transmission path.
After the signal waveform of plus or minus is output, it is necessary to return the signal voltage to zero in preparation for the next signal waveform. For example, there is no problem when the signal voltage returns to zero within the discharging period as represented by the dotted line following the plus waveform shown in FIG. 13. However, actually, when the charges accumulated in the floating capacitance by the signal voltage attributed to the output of the plus or minus signal waveform are naturally discharged, as represented by the dotted line following the minus waveform in FIG. 13, it takes time until the signal voltage returns to zero. In this case, when the logic to be transmitted at the next clock timing is “1”, the transmission side does not output any plus or minus signal voltage (zero output). Therefore, the minus voltage attributed to the residual charges is sensed on the reception side, which may incorrectly be recognized as logic “0”.
Accordingly, there is provided a circuit that forcibly discharges the residual charges, which inhibit signal transmission, through use of discharging resistors connected between the two lines of the transmission path (e.g., see Patent Literature 1). Such discharging resistors can be provided in the indoor unit or in the remote controller.